Field of the Invention
The invention relates to a test circuit and a testing method for function testing of electronic circuits that have outputs.
Testing of electronic circuits for freedom from defects is a task that arises frequently. Such tests are often performed, especially following the process of manufacturing the circuits. In such cases it is desirable to limit the testing to placing the electronic circuit into a defined state and then merely observing the signals at its outputs and comparing them with limit or command values to be met if the circuit is functioning properly. Depending on the type of electronic circuit, a more or less certain statement can then be made as to the satisfactory function of the entire circuit.
Integrated memory components, such as RAMs, are, for instance, subjected to such function testing at the manufacturer. Each output of the memory components to be tested is connected to one terminal of a tester array that carries out the testing. Next, the tester array writes on the memory cells of the memory component and reads them out again. In that way, malfunctions of the tested circuit can be found.
When electronic circuits are tested according to the prior art described, a limitation in testing capacity exists for a given number of terminals in the tester array:
A circuit can be tested completely, or a plurality of circuits can be tested simultaneously with a tester array only if the total number of outputs to be tested does not exceed the number of corresponding terminals of the tester array. Increasing the testing capacity can be done only by using a tester array having a larger number of corresponding terminals, or by using additional tester arrays.